Vertical integration of system-on-chip concepts in the digital design curriculum

Ying Tang; Linda M. Head; Ravi P. Ramachandran; Lawrence M. Chatman

doi:10.1109/TE.2010.2050773

Vertical integration of system-on-chip concepts in the digital design curriculum

Ying Tang
, Linda M. Head
, Ravi P. Ramachandran
, Lawrence M. Chatman

Research output: Contribution to journal › Article › peer-review

12 Scopus citations

Abstract

The rapid evolution of System-on-Chip (SoC) challenges academic curricula to keep pace with multidisciplinary/interdisciplinary system thinking. This paper presents a curricular prototype that cuts across artificial course boundaries and provides a meaningful exploration of diverse facets of SoC design. Specifically, experimental contents of a digital flow SoC product design-a simplified Transmission Control Protocol (TCP)/Internet Protocol (IP) stack-are systematically developed and implemented in the series of courses that comprise the Digital Design track of the Rowan Electrical and Computer Engineering (ECE) curriculum. The System-on-Chip project and its progressively more complex laboratory modules are described and discussed. Its implementation in the existing ECE curriculum is also presented along with the assessment results.

Original language	English (US)
Article number	5477209
Pages (from-to)	188-196
Number of pages	9
Journal	IEEE Transactions on Education
Volume	54
Issue number	2
DOIs	https://doi.org/10.1109/TE.2010.2050773
State	Published - May 2011

All Science Journal Classification (ASJC) codes

Education
Electrical and Electronic Engineering

Access to Document

10.1109/TE.2010.2050773

Cite this

@article{cbf5350193554d539a61f4173be9541a,

title = "Vertical integration of system-on-chip concepts in the digital design curriculum",

abstract = "The rapid evolution of System-on-Chip (SoC) challenges academic curricula to keep pace with multidisciplinary/interdisciplinary system thinking. This paper presents a curricular prototype that cuts across artificial course boundaries and provides a meaningful exploration of diverse facets of SoC design. Specifically, experimental contents of a digital flow SoC product design-a simplified Transmission Control Protocol (TCP)/Internet Protocol (IP) stack-are systematically developed and implemented in the series of courses that comprise the Digital Design track of the Rowan Electrical and Computer Engineering (ECE) curriculum. The System-on-Chip project and its progressively more complex laboratory modules are described and discussed. Its implementation in the existing ECE curriculum is also presented along with the assessment results.",

author = "Ying Tang and Head, \{Linda M.\} and Ramachandran, \{Ravi P.\} and Chatman, \{Lawrence M.\}",

note = "Funding Information: Manuscript received August 30, 2009; revised December 16, 2009; accepted April 05, 2010. Date of publication June 03, 2010; date of current version May 04, 2011. This work was supported by the National Science Foundation under Grant 0633512.",

year = "2011",

month = may,

doi = "10.1109/TE.2010.2050773",

language = "English (US)",

volume = "54",

pages = "188--196",

journal = "IEEE Transactions on Education",

issn = "0018-9359",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

number = "2",

}

TY - JOUR

T1 - Vertical integration of system-on-chip concepts in the digital design curriculum

AU - Tang, Ying

AU - Head, Linda M.

AU - Ramachandran, Ravi P.

AU - Chatman, Lawrence M.

N1 - Funding Information: Manuscript received August 30, 2009; revised December 16, 2009; accepted April 05, 2010. Date of publication June 03, 2010; date of current version May 04, 2011. This work was supported by the National Science Foundation under Grant 0633512.

PY - 2011/5

Y1 - 2011/5

N2 - The rapid evolution of System-on-Chip (SoC) challenges academic curricula to keep pace with multidisciplinary/interdisciplinary system thinking. This paper presents a curricular prototype that cuts across artificial course boundaries and provides a meaningful exploration of diverse facets of SoC design. Specifically, experimental contents of a digital flow SoC product design-a simplified Transmission Control Protocol (TCP)/Internet Protocol (IP) stack-are systematically developed and implemented in the series of courses that comprise the Digital Design track of the Rowan Electrical and Computer Engineering (ECE) curriculum. The System-on-Chip project and its progressively more complex laboratory modules are described and discussed. Its implementation in the existing ECE curriculum is also presented along with the assessment results.

AB - The rapid evolution of System-on-Chip (SoC) challenges academic curricula to keep pace with multidisciplinary/interdisciplinary system thinking. This paper presents a curricular prototype that cuts across artificial course boundaries and provides a meaningful exploration of diverse facets of SoC design. Specifically, experimental contents of a digital flow SoC product design-a simplified Transmission Control Protocol (TCP)/Internet Protocol (IP) stack-are systematically developed and implemented in the series of courses that comprise the Digital Design track of the Rowan Electrical and Computer Engineering (ECE) curriculum. The System-on-Chip project and its progressively more complex laboratory modules are described and discussed. Its implementation in the existing ECE curriculum is also presented along with the assessment results.

UR - https://www.scopus.com/pages/publications/79955579185

UR - https://www.scopus.com/pages/publications/79955579185#tab=citedBy

U2 - 10.1109/TE.2010.2050773

DO - 10.1109/TE.2010.2050773

M3 - Article

AN - SCOPUS:79955579185

SN - 0018-9359

VL - 54

SP - 188

EP - 196

JO - IEEE Transactions on Education

JF - IEEE Transactions on Education

IS - 2

M1 - 5477209

ER -

Vertical integration of system-on-chip concepts in the digital design curriculum

Abstract

All Science Journal Classification (ASJC) codes

Access to Document

Other files and links

Fingerprint

Cite this