TY - GEN
T1 - Modular Scalable Power Electronics Building Block Based MVDC Solid State Circuit Breakers
AU - Zhao, Shuyan
AU - Wang, Yao
AU - Kheirollahi, Reza
AU - Shanker, Yashraj
AU - Wartenberg, Jeremy
AU - Murphy, Dana
AU - Zhang, Hua
AU - Lu, Fei
N1 - Publisher Copyright:
© 2023 IEEE.
PY - 2023
Y1 - 2023
N2 - This paper presents a design methodology of modular medium-voltage direct current (MVDC) solid-state circuit breakers (SSCBs) based on scalable power electronics building block (PEBB) units. Regarding the PEBB, 1) isolated gate drive, 2) natural convection cooling and 3) voltage clamping circuit are introduced. There are three major contributions of this paper. First, the PEBB concept is proposed for MVDC SSCB design for the first time. Second, a novel hybrid MOV based voltage clamping circuit is proposed to increase PEBB voltage rating thence enhancing SSCB efficiency. Third, a PEBB parallel packaging method is proposed based on economic analysis of compromise between efficiency enhancement and cost. A symmetrical busbar layout is proposed to ensure parallel switches consistency. A 1.33kV/40A PEBB prototype is successfully implemented, which is experimentally validated by 40A/1hour continuous conduction test and 1.33kV/200A fault interruption test. A 1.33kV/400A power disk prototype is then implemented based on 10 paralleled PEBBs and symmetrical busbar connections. A 400A/1hour continuous dc conduction test is conducted to verify its state-of-the-art 99.98% steady state efficiency, which paves the way for the next generation of high efficiency ultrafast solid-state breakers for MVDC systems.
AB - This paper presents a design methodology of modular medium-voltage direct current (MVDC) solid-state circuit breakers (SSCBs) based on scalable power electronics building block (PEBB) units. Regarding the PEBB, 1) isolated gate drive, 2) natural convection cooling and 3) voltage clamping circuit are introduced. There are three major contributions of this paper. First, the PEBB concept is proposed for MVDC SSCB design for the first time. Second, a novel hybrid MOV based voltage clamping circuit is proposed to increase PEBB voltage rating thence enhancing SSCB efficiency. Third, a PEBB parallel packaging method is proposed based on economic analysis of compromise between efficiency enhancement and cost. A symmetrical busbar layout is proposed to ensure parallel switches consistency. A 1.33kV/40A PEBB prototype is successfully implemented, which is experimentally validated by 40A/1hour continuous conduction test and 1.33kV/200A fault interruption test. A 1.33kV/400A power disk prototype is then implemented based on 10 paralleled PEBBs and symmetrical busbar connections. A 400A/1hour continuous dc conduction test is conducted to verify its state-of-the-art 99.98% steady state efficiency, which paves the way for the next generation of high efficiency ultrafast solid-state breakers for MVDC systems.
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U2 - 10.1109/APEC43580.2023.10131219
DO - 10.1109/APEC43580.2023.10131219
M3 - Conference contribution
AN - SCOPUS:85162215798
T3 - Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC
SP - 1608
EP - 1615
BT - APEC 2023 - 38th Annual IEEE Applied Power Electronics Conference and Exposition
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 38th Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2023
Y2 - 19 March 2023 through 23 March 2023
ER -