Low-power time-based ADC with alternating time-residue amplification

A time-based analogue-to-digital converter (ADC) that can exhibit both low power and high resolution is introduced. By amplifying alternate time residues and successively subtracting the comparatorinduced timing offset, both fast conversion speed of 2N cycles for an N-bit converter and very small input-referred timing offset are achieved. For a 12-bit ADC implemented in a 0.18 μm CMOS process, an effective number of bits of 10.8 has been measured at a sampling frequency of 100 kHz, while consuming 30 μW of total power.