Low-power time-based ADC with alternating time-residue amplification

J. Jung, S. Shin

Research output: Contribution to journalArticlepeer-review

2 Scopus citations

Abstract

A time-based analogue-to-digital converter (ADC) that can exhibit both low power and high resolution is introduced. By amplifying alternate time residues and successively subtracting the comparatorinduced timing offset, both fast conversion speed of 2N cycles for an N-bit converter and very small input-referred timing offset are achieved. For a 12-bit ADC implemented in a 0.18 μm CMOS process, an effective number of bits of 10.8 has been measured at a sampling frequency of 100 kHz, while consuming 30 μW of total power.

Original languageEnglish (US)
Pages (from-to)1845-1847
Number of pages3
JournalElectronics Letters
Volume52
Issue number22
DOIs
StatePublished - Oct 27 2016

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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