@inproceedings{cc88eb3d52f6457ca891fc68ee7617c2,
title = "Low-power 2.4GHz CMOS frequency synthesizer with differentially controlled MOS varactors",
abstract = "A fully-differential quadrature PLL with common-mode noise immunity has been developed by using a differentially controlled Quadrature-VCO (Q-VCO) along with a differential Charge-Pump (CP). To increase the Common-Mode Rejection Ratio (CMRR) of Q-VCO, a simple bias shifting technique was used with accumulation-depletion mode MOS varactors. The measured minimum CMRR of the Q-VCO control gain is more than 30dB and the frequency tuning range is 263% around the 2.5GHz center frequency with a 3-bit capacitor bank array. To reduce the overall power consumption, an architectural optimization and an Inter-Stage impedance Matching (ISM) techniques were used in frequency divider circuits. Our frequency synthesizer was fabricated in a 1P6M 0.18μm RFCMOS process, and the measured phase noise is -112dBc/Hz at IMHz offset from the 2.458GHz output frequency while the total PLL current consumption is 8.2mA for 1.8V supply voltage.",
author = "Sangho Shin and Kwyro Lee and Kang, {Sung Mo}",
year = "2006",
language = "English (US)",
isbn = "0780393902",
series = "Proceedings - IEEE International Symposium on Circuits and Systems",
pages = "553--556",
booktitle = "ISCAS 2006",
note = "ISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems ; Conference date: 21-05-2006 Through 24-05-2006",
}