This paper introduces a laboratory and fabrication procedure for evaluating the cracking performance of chip seal and microsurfacing under various distress conditions using the Texas Overlay Tester. Three damage severity levels were evaluated as part of this study: excellent condition with no cracks, low severity cracks, and medium severity cracks. The data was evaluated using OT cycles to failure, a pseudo-tensile work indicator, and ANOVA to capture the differences among the various samples. The results show the test is sensitive to treatment type and show a decrease in performance with increase in crack severity.
All Science Journal Classification (ASJC) codes
- Civil and Structural Engineering
- Building and Construction
- Materials Science(all)