An Experimental Coin-Sized Radio for Extremely Low-Power WPAN (IEEE 802.15.4) Application at 2.4 GHz

Pilsoon Choi; Hyung Chul Park; Sohyeong Kim; Sungchung Park; Ilku Nam; Tae Wook Kim; Seokjong Park; Sangho Shin; Myeung Su Kim; Kyucheol Kang; Yeonwoo Ku; Hyokjae Choi; Sook Min Park; Kwyro Lee

doi:10.1109/JSSC.2003.819083

An Experimental Coin-Sized Radio for Extremely Low-Power WPAN (IEEE 802.15.4) Application at 2.4 GHz

Pilsoon Choi
, Hyung Chul Park
, Sohyeong Kim
, Sungchung Park
, Ilku Nam
, Tae Wook Kim
, Seokjong Park
, Sangho Shin
, Myeung Su Kim
, Kyucheol Kang
, Yeonwoo Ku
, Hyokjae Choi
, Sook Min Park
, Kwyro Lee

Research output: Contribution to journal › Article › peer-review

114 Scopus citations

Abstract

An experimental 2.4-GHz CMOS radio composed of RF and digital circuits for the low-power and low-rate preliminary IEEE802.15.4 WPAN is reported, consuming 21 mW in receive mode and 30 mW in transmit mode. The RF design focus is to maximize linearity for a given power consumption using linearization methods which lead an order of magnitude improvement in LNA/mixer IIP3/power performance. Chip-on-PCB technology allows implementation of a coin-sized radio at very low cost, which also provides 3 dBi gain patch antenna and high Q (>50) inductors.

Original language	English (US)
Pages (from-to)	2258-2268
Number of pages	11
Journal	IEEE Journal of Solid-State Circuits
Volume	38
Issue number	12
DOIs	https://doi.org/10.1109/JSSC.2003.819083
State	Published - Dec 2003
Externally published	Yes

All Science Journal Classification (ASJC) codes

Electrical and Electronic Engineering

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10.1109/JSSC.2003.819083

Cite this

@article{f7d93f07e43f45738f3316d2f244910e,

title = "An Experimental Coin-Sized Radio for Extremely Low-Power WPAN (IEEE 802.15.4) Application at 2.4 GHz",

abstract = "An experimental 2.4-GHz CMOS radio composed of RF and digital circuits for the low-power and low-rate preliminary IEEE802.15.4 WPAN is reported, consuming 21 mW in receive mode and 30 mW in transmit mode. The RF design focus is to maximize linearity for a given power consumption using linearization methods which lead an order of magnitude improvement in LNA/mixer IIP3/power performance. Chip-on-PCB technology allows implementation of a coin-sized radio at very low cost, which also provides 3 dBi gain patch antenna and high Q (>50) inductors.",

author = "Pilsoon Choi and Park, \{Hyung Chul\} and Sohyeong Kim and Sungchung Park and Ilku Nam and Kim, \{Tae Wook\} and Seokjong Park and Sangho Shin and Kim, \{Myeung Su\} and Kyucheol Kang and Yeonwoo Ku and Hyokjae Choi and Park, \{Sook Min\} and Kwyro Lee",

note = "Funding Information: Manuscript received April 18, 2003; revised July 24, 2003. This work was supported by the MICROS Research Center.",

year = "2003",

month = dec,

doi = "10.1109/JSSC.2003.819083",

language = "English (US)",

volume = "38",

pages = "2258--2268",

journal = "IEEE Journal of Solid-State Circuits",

issn = "0018-9200",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

number = "12",

}

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AU - Choi, Pilsoon

AU - Park, Hyung Chul

AU - Kim, Sohyeong

AU - Park, Sungchung

AU - Nam, Ilku

AU - Kim, Tae Wook

AU - Park, Seokjong

AU - Shin, Sangho

AU - Kim, Myeung Su

AU - Kang, Kyucheol

AU - Ku, Yeonwoo

AU - Choi, Hyokjae

AU - Park, Sook Min

AU - Lee, Kwyro

N1 - Funding Information: Manuscript received April 18, 2003; revised July 24, 2003. This work was supported by the MICROS Research Center.

PY - 2003/12

Y1 - 2003/12

N2 - An experimental 2.4-GHz CMOS radio composed of RF and digital circuits for the low-power and low-rate preliminary IEEE802.15.4 WPAN is reported, consuming 21 mW in receive mode and 30 mW in transmit mode. The RF design focus is to maximize linearity for a given power consumption using linearization methods which lead an order of magnitude improvement in LNA/mixer IIP3/power performance. Chip-on-PCB technology allows implementation of a coin-sized radio at very low cost, which also provides 3 dBi gain patch antenna and high Q (>50) inductors.

AB - An experimental 2.4-GHz CMOS radio composed of RF and digital circuits for the low-power and low-rate preliminary IEEE802.15.4 WPAN is reported, consuming 21 mW in receive mode and 30 mW in transmit mode. The RF design focus is to maximize linearity for a given power consumption using linearization methods which lead an order of magnitude improvement in LNA/mixer IIP3/power performance. Chip-on-PCB technology allows implementation of a coin-sized radio at very low cost, which also provides 3 dBi gain patch antenna and high Q (>50) inductors.

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EP - 2268

JO - IEEE Journal of Solid-State Circuits

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ER -

An Experimental Coin-Sized Radio for Extremely Low-Power WPAN (IEEE 802.15.4) Application at 2.4 GHz

Abstract

All Science Journal Classification (ASJC) codes

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