Abstract
An experimental 2.4-GHz CMOS radio composed of RF and digital circuits for the low-power and low-rate preliminary IEEE802.15.4 WPAN is reported, consuming 21 mW in receive mode and 30 mW in transmit mode. The RF design focus is to maximize linearity for a given power consumption using linearization methods which lead an order of magnitude improvement in LNA/mixer IIP3/power performance. Chip-on-PCB technology allows implementation of a coin-sized radio at very low cost, which also provides 3 dBi gain patch antenna and high Q (>50) inductors.
Original language | English (US) |
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Pages (from-to) | 2258-2268 |
Number of pages | 11 |
Journal | IEEE Journal of Solid-State Circuits |
Volume | 38 |
Issue number | 12 |
DOIs | |
State | Published - Dec 2003 |
Externally published | Yes |
All Science Journal Classification (ASJC) codes
- Electrical and Electronic Engineering