A 4.9mW 270MHz CMOS frequency synthesizer/FSK modulator

Hyokjae Choi, Sangho Shin, Yeonwoo Ku, Mooil Jeong, Kwyro Lee

Research output: Contribution to conferencePaperpeer-review

7 Scopus citations

Abstract

A 270MHz frequency synthesizer/FSK modulator for low-rate WPAN is implemented. It consumes only 4.9mW adopting current re-using technique, self-DC biasing scheme, and appropriate divider architecture. The 3 rd-order feedback type DSM and the high performance charge pump are designed for wide loop bandwidth, which enables to design a low power and low noise frequency synthesizer. The implemented prototype offers 500kHz-loop bandwidth and -104dBc/Hz in-band noise. It also plays a role as a FSK modulator which shows only 1.1 dB degradation at 10-3 symbol BER compared with the ideal FSK-modulator.

Original languageEnglish (US)
Pages443-446
Number of pages4
StatePublished - 2003
Externally publishedYes
Event2003 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium - Philadelphia, PA, United States
Duration: Jun 8 2003Jun 10 2003

Other

Other2003 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium
Country/TerritoryUnited States
CityPhiladelphia, PA
Period6/8/036/10/03

All Science Journal Classification (ASJC) codes

  • General Engineering

Fingerprint

Dive into the research topics of 'A 4.9mW 270MHz CMOS frequency synthesizer/FSK modulator'. Together they form a unique fingerprint.

Cite this