TY - GEN
T1 - 0.18um CMOS integrated chipset for 5.8GHz DSRC systems with +10dBm output power
AU - Shin, Sangho
AU - Yun, Seokoh
AU - Cho, Sanghyun
AU - Kim, Jongmoon
AU - Kang, Minseok
AU - Oh, Wonkap
AU - Kang, Sung Mo
PY - 2008
Y1 - 2008
N2 - This paper describes a radio architecture and circuit implementation results for Korea/Japan standards of 5.8GHz DSRC systems. By characterizing specific system features concerning practical environments such as communication cell area and in-vehicle temperature, we extract detailed design specifications and show a practical system implementation. Also, we introduce a new receiver sensitivity control method which has superior signal quality over the conventional ones by gating the detected RX data with respect to the received RSSI, without degradation of receiver SNR. When the complete transceiver circuit is integrated on a chip using 0.18um CMOS technology, the transmitter carries up to +10.5dBm of output power and the receiver has less than 17dB of system noise figure. The active current consumptions are 102mA and 52mA during TX- and RX-modes, respectively, for 1.8V supply voltage.
AB - This paper describes a radio architecture and circuit implementation results for Korea/Japan standards of 5.8GHz DSRC systems. By characterizing specific system features concerning practical environments such as communication cell area and in-vehicle temperature, we extract detailed design specifications and show a practical system implementation. Also, we introduce a new receiver sensitivity control method which has superior signal quality over the conventional ones by gating the detected RX data with respect to the received RSSI, without degradation of receiver SNR. When the complete transceiver circuit is integrated on a chip using 0.18um CMOS technology, the transmitter carries up to +10.5dBm of output power and the receiver has less than 17dB of system noise figure. The active current consumptions are 102mA and 52mA during TX- and RX-modes, respectively, for 1.8V supply voltage.
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U2 - 10.1109/ISCAS.2008.4541828
DO - 10.1109/ISCAS.2008.4541828
M3 - Conference contribution
AN - SCOPUS:51749103954
SN - 9781424416844
T3 - Proceedings - IEEE International Symposium on Circuits and Systems
SP - 1958
EP - 1961
BT - 2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008
T2 - 2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008
Y2 - 18 May 2008 through 21 May 2008
ER -